The present invention relates to a probe card for wafer-level measurement, a multilayer ceramic wiring board, and fabricating methods therefor.
With recent remarkable advances in the size and cost reductions of electronic equipment provided with a semiconductor integrated circuit device, size and cost reductions have also been required of the semiconductor device mounted thereon.
In the process of fabricating a semiconductor device, an electric interconnection is normally provided between a semiconductor chip and a leadframe by bonding wires. The semiconductor chip and the leadframe are then sealed with a resin or ceramic package to be mounted on a printed circuit board. To meet the demand for miniaturization, there has been developed a method of mounting a bare chip directly on a circuit board. Therefore, it is necessary to test the bare chip prior to be mounted on the circuit board.
For the quality assurance of bare chips, it is necessary to perform a burn-in or like test of the bare chips. However, it required considerable time to perform separate testing of a plurality of bare chips over several times by inspecting one or more chips at a time. Accordingly, it is preferable that all the bare chips on a semiconductor wafer are test simultaneously.
To conduct a wafer-level test on the bard chips, it is required to simultaneously drive the plurality of semiconductor devices formed in the semiconductor wafer by applying a power-source voltage or signals to electrodes of the semiconductor chips at a time. To meet the requirement, a probe card having numerous probe needles (normally several tens of probe needles or more) is needed. However, a conventional probe card with needles is unsatisfactory in both the number of pins and cost.
To overcome the disadvantage of the conventional probe card, there has been proposed a probe card with probe electrodes that can be brought into simultaneous contact with a large number of pad electrodes on a wafer (see Japanese Unexamined Patent Publication No. 7-231019). According to the technology disclosed in the publication, a large number of bumps are formed in the probe card and used as the probe electrodes.
The probe card needs a multilayer wiring board for supplying a power-source voltage and an electric signal to each of the bumps. The multilayer wiring board is manufactured by forming multilevel wiring layers on a glass substrate.
To insulate such multilevel wiring layers, an interlevel dielectric film is formed by applying a polyimide thin film or the like to the surface of the glass substrate. However, the thickness of the polyimide thin film is at most in the range of 5 to 10 .mu.m because of limitations to the fabricating method. Since capacitance coupling occurred between the individual wiring layers insulated by the interlevel dielectric film having a thickness in the range, a high-frequency signal cannot be used for wafer-level measurement.
It is therefore an object of the present invention, which has been achieved in view of the foregoing, to provide a probe card which enables wafer-level measurement using a high-frequency signal, a multilayer ceramic wiring board suitable for use in the probe card, and fabricating methods therefor.